Ashling* RiscFree* Integrated Development Environment (IDE) for Intel® FPGAs User Guide

ID 730783
Date 7/26/2024
Public
Document Table of Contents

1.1. Supported Devices

The following devices support Nios® V processor core debugging:

  • Agilex™ 5
  • Agilex® 7
  • Stratix® 10
  • Stratix® V
  • Stratix® IV
  • Arria® 10
  • Arria® II GX
  • Arria® II GZ
  • Arria® V
  • Arria® V GZ
  • Cyclone® 10 GX
  • Cyclone® IV E
  • Cyclone® IV GX
  • Cyclone® V
  • Cyclone® 10 LP
  • MAX® 10

The following devices with SoC feature support Arm* HPS debugging:

  • Agilex™ 5
  • Agilex® 7
  • Stratix® 10
  • Arria® 10
  • Cyclone® V