Visible to Intel only — GUID: sjn1719153717967
Ixiasoft
Visible to Intel only — GUID: sjn1719153717967
Ixiasoft
2.2.1.7. Debugging the Project
To debug a software project, navigate to Debug and click on Debug Configurations. This command conducts the following actions:
- Creates an Ashling RISC-V Hardware Debugging.
- Builds the project executable. If all target files are up to date, nothing is built.
- If debugging on hardware, establish communications with the target and verify that the FPGA is configured with the correct hardware design.
- Downloads the .elf to the target memory.
- Sets a breakpoint at the top of main().
- Starts execution at the .elf entry point.
The RiscFree* IDE for Intel® FPGAs debugger with the Nios® V processor plugins provides a perspective, allowing you to perform many common debugging tasks. Debugging a Nios® V processor program with the Nios® V plugins is generally the same as debugging any other C/C++ program with RiscFree* IDE for Intel® FPGAs and the CDT plugins.
For information about debugging with RiscFree* IDE for Intel® FPGAs and the CDT plugins, refer to the RiscFree* IDE for Intel® FPGAs help system.