F-Tile HDMI Intel® FPGA IP Design Example User Guide

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ID 709314
Date 4/22/2022
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Document Table of Contents
Document Table of Contents x
1. HDMI Intel® FPGA IP Design Example Quick Start Guide for Intel® Agilex™ F-tile Devices 2. HDMI 2.1 Design Example (Support FRL = 1) 3. Document Revision History for the F-Tile HDMI Intel® FPGA IP Design Example User Guide
1. HDMI Intel® FPGA IP Design Example Quick Start Guide for Intel® Agilex™ F-tile Devices x
1.1. Directory Structure 1.2. Generating the Design 1.3. Simulating the Design 1.4. Compiling and Testing the Design
2. HDMI 2.1 Design Example (Support FRL = 1) x
2.1. Design Features 2.2. Hardware and Software Requirements 2.3. HDMI 2.1 RX-TX Retransmit Design Block Diagram 2.4. Design Parameters 2.5. Design Components 2.6. Design Software Flow 2.7. Clocking Scheme 2.8. Interface Signals 2.9. Hardware Setup 2.10. Simulation Testbench 2.11. Debugging Features
2.3. HDMI 2.1 RX-TX Retransmit Design Block Diagram x
2.3.1. Creating RX-Only or TX-Only Designs
2.4. Design Parameters x
2.4.1. IP Parameters 2.4.2. HDMI Intel® FPGA IP Design Example Parameters
2.5. Design Components x
2.5.1. HDMI TX Components 2.5.2. HDMI RX Components 2.5.3. Top-Level Common Blocks
2.5.1. HDMI TX Components x
2.5.1.1. TX PHY Adapter
2.5.1.1. TX PHY Adapter x
2.5.1.1.1. FRL
2.5.2. HDMI RX Components x
2.5.2.1. RX PHY Adapter
2.5.2.1. RX PHY Adapter x
2.5.2.1.1. FRL
2.11. Debugging Features x
2.11.1. Software Debug Message 2.11.2. SCDC Information from Sink Connected to TX 2.11.3. Clock Frequency Measurement
1. HDMI Intel® FPGA IP Design Example Quick Start Guide for Intel® Agilex™ F-tile Devices
2. HDMI 2.1 Design Example (Support FRL = 1)
3. Document Revision History for the F-Tile HDMI Intel® FPGA IP Design Example User Guide

2.4.1. IP Parameters

Table 7.  HDMI RX Direction
Parameter Value Description
DIRECTION Receiver Determines the selection for HDMI Simplex RTL
SUPPORT DEEP COLOR
  • 0: No deep color
  • 1: Deep color
 Determines if the core can encode deep color formats.
SUPPORT AUXILIARY
  • 0: No AUX
  • 1: AUX
 Determines if the auxiliary channel encoding is included.
SUPPORT AUDIO
  • 0: No audio
  • 1: Audio
 Determines if the core can encode audio.
PIXELS PER CLOCK 8 Supports 8 symbols per clock for Intel Agilex devices.
SUPPORT FRL 1: Enable For Intel® Agilex™ Devices, only SUPPORT_FRL = 1 is supported
INCLUDE I2C MASTER/SLAVE
  • 0: Disable
  • 1: Enable
 Determines if the I2C slave block is included.
INCLUDE EDID RAM
  • 0: Disable
  • 1: Enable
 Determines if the EDID RAM block is included.
EDID_RAM_ADDR_WIDTH 8 (Default Value) Log base 2 of the EDID RAM size.
Table 8.  HDMI TX Direction
Parameter Value Description
DIRECTION Transmitter Determines the selection for HDMI Simplex RTL
SUPPORT DEEP COLOR
  • 0: No deep color
  • 1: Deep color
 Determines if the core can encode deep color formats.
SUPPORT AUXILIARY
  • 0: No AUX
  • 1: AUX
 Determines if the auxiliary channel encoding is included.
SUPPORT AUDIO
  • 0: No audio
  • 1: Audio
 Determines if the core can encode audio.
PIXELS PER CLOCK 8 Supports 8 symbols per clock for Intel Agilex devices.
SUPPORT FRL 1: Enable For Agilex Devices, only SUPPORT_FRL = 1 is supported
INCLUDE I2C MASTER/SLAVE
  • 0: Disable
  • 1: Enable
 Determines if the I2C slave block is included.
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