The following guidelines and requirements target general PCB panels. FR4 stack-up can be an option to reduce cost. Otherwise, Rogers or other more advanced materials are also applicable by independently evaluating stack-up requirements based on the attributes below. Rogers is commonly used for better signaling on larger panels.

You must ensure the cables meet HDMI 2.1 certification. HDMI.org provides a list of compliant connectors provider as well as HDMI 2.1 compliant cable. HDMI IP running 12 Gbps FRL is tested with Belkin cables.

HDMI 2.1 accommodates both Transition Minimized Differential Signaling (TMDS) and Fixed Rate Link (FRL) modes. TMDS targets support for legacy HDMI devices running on 3 data lanes and 1 clock lane while FRL runs on 4 data lanes.

On the RX, the TMDS clock path shares the FRL data lane. Thus, a fanout buffer is needed to demultiplex/split incoming RX signal to drive both paths to support both TMDS and FRL on the PCB panel with Intel FPGA. At the schematic level, one of the design approaches is to go with external fanout buffer. However, the additional fanout buffer increases system costs. Another option is to use an integrated fanout buffer option with redriver. The redriver is required at the RX side to recover signals at 16dB up to 12 Gbps.

HDMI 2.1 operates up to 12 Gbps with cable loss of up to 16dB. For cost optimization, use the redriver at the transmitter side.

The daughtercard panel size is small with high speed traces within 10 inches. If you target larger margin and desire for larger panel, you can opt for Meg6 material. Intel recommends a flex cable topology for signals up to 12 Gbps.