AN 900: Intel® Arria 10 DisplayPort 8K RX-only Design

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ID 683799
Date 7/02/2021
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Arria® 10 DisplayPort 8K RX-only Design
1. Intel® Arria® 10 DisplayPort 8K RX-only Design x
1.1. Design Components 1.2. Clocking Scheme 1.3. Top Level Interface Signals 1.4. Quick Start Guide 1.5. Creating the RX-only Design 1.6. Document Revision History for AN 900: Intel® Arria® 10 DisplayPort 8K RX-only Design
1.4. Quick Start Guide x
1.4.1. Hardware and Software Requirements 1.4.2. Directory Structure 1.4.3. Compiling the Design 1.4.4. Running the Design on Hardware 1.4.5. Design Debug Features
1.4.3. Compiling the Design x
1.4.3.1. Regenerating and Downloading ELF File
1.4.5. Design Debug Features x
1.4.5.1. Main Stream Attribute (MSA) Information 1.4.5.2. Auxiliary Channel Traffic Monitor 1.4.5.3. Signal Tap Logic Analyzer 1.4.5.4. Onboard User LED Functions
1.5. Creating the RX-only Design x
1.5.1. Generating the Design 1.5.2. Removing Irrelevant Blocks 1.5.3. Making a Direct Connection to the RX Transceiver Block 1.5.4. Selecting the Bitec FMC Daughter Card Revision 1.5.5. Modifying the Software
1.5.2. Removing Irrelevant Blocks x
1.5.2.1. Removing Irrelevant Block in Top Level Example Design a10_dp_demo.v File 1.5.2.2. Removing Irrelevant Block in Platform Designer
1. Intel® Arria® 10 DisplayPort 8K RX-only Design

1.4.3. Compiling the Design

You can download the DisplayPort 8K RX-only design file (A10_DP_RX_FMC_PRO.par) from the Intel Design Store. To compile and run a demonstration test on the hardware design example using a Bitec Rev 11 card, follow these steps.
The .par file includes pre-compiled .sof files that you can run to test the design.
  1. To extract the files in the .par file, refer to the Installation Package instruction in the Intel Design Store design download page.
  2. After extracting the .par file, unzip the Additional_Files.zip file from the A10_DP_RX_FMC_PRO.par file, and move the Script and Software folder to the main project directory.
  3. Launch the Intel® Quartus® Prime Pro Edition software and open <project directory>/top.qpf.
    Note: Bitec DisplayPort FMC daughter card revision 9 and later includes a retimer component at RX to support HBR3 rate. To receive an 8K video resolution, change the local parameter, BITEC_DP_CARD_REV, in the top-level RTL file of the design example at <project directory>/rtl/top.v file to revision 9 or later. Similarly, make the same changes in the <project directory>/software/dp_demo/config.h. 
    localparam BITEC_DP_CARD_REV = 2;
    // 0 = Bitec FMC DP card rev.4 - 8,
    // 1 = rev.9 - 10
    // 2 = rev.11
  4. Open Nios® II Command Shell and navigate to the Script folder.
  5. Run the build_sw_sh script in the Nios® II terminal to build the software.
  6. In the Intel® Quartus® Prime Pro Edition software, click Processing > Start Compilation.
  7. After successful compilation, the Intel® Quartus® Prime Pro Edition software generates a .sof file in your specified directory.
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