Intel Agilex® 7 FPGA F-Series Transceiver-SoC Development Kit User Guide

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ID 683752
Date 4/21/2023
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Powering Up the Development Kit 4. Board Test System 5. Development Kit Hardware and Configuration 6. Custom Projects for the Development Kit 7. Revision History A. Development Kit Components B. Additional Information
1. Overview x
1.1. Block Diagram 1.2. Feature Summary 1.3. Box Contents 1.4. Recommended Operating Conditions
2. Getting Started x
2.1. Intel® Quartus® Prime Software and Driver Installation 2.2. Quick Start Guide 2.3. Design Examples
3. Powering Up the Development Kit x
3.1. Default Settings 3.2. Power Up 3.3. Perform board restore
3.3. Perform board restore x
3.3.1. Restore board System Intel® MAX® 10 with default factory image 3.3.2. Restore board QSPI flash with the default factory image
4. Board Test System x
4.1. Setting Up the BTS GUI Running Environment 4.2. Test the functionality of the Development Kits 4.3. Control on-board clock through Clock Controller GUI 4.4. Control on-board power regulator through Power Monitor GUI
4.1. Setting Up the BTS GUI Running Environment x
4.1.1. Downloading OpenJDK 4.1.2. Downloading OpenJFX 4.1.3. Installing OpenJDK and OpenJFX 4.1.4. Installing the Quartus Prime Software 4.1.5. Running the BTS GUI
4.2. Test the functionality of the Development Kits x
4.2.1. The Configure Menu 4.2.2. The Sys Info Tab 4.2.3. The GPIO Tab 4.2.4. The XCVR Tab 4.2.5. The DDR4 Tab 4.2.6. The SSS Tab 4.2.7. The EEPROM Tab
5. Development Kit Hardware and Configuration x
5.1. Configure FPGA and access HPS Debug Access Port by JTAG 5.2. Configure the FPGA device by AS modes (Default Mode) 5.3. Configure the FPGA device by AvST modes 5.4. Daughter Cards
5.4. Daughter Cards x
5.4.1. HPS Out of Box Experience (OOBE) Daughter Card 5.4.2. HPS NAND Daughter Card
6. Custom Projects for the Development Kit x
6.1. Add SmartVID settings in Intel® Quartus® Prime QSF file 6.2. Golden Top
A. Development Kit Components x
A.1. System Management A.2. Power A.3. Clocks A.4. General Input/Output A.5. Memory Interfaces A.6. Communication Interfaces A.7. Daughter Cards
B. Additional Information x
B.1. Safety and Regulatory Information B.2. Compliance Information
B.1. Safety and Regulatory Information x
B.1.1. Safety Warnings B.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Powering Up the Development Kit
4. Board Test System
5. Development Kit Hardware and Configuration
6. Custom Projects for the Development Kit
7. Revision History
A. Development Kit Components
B. Additional Information

4.4. Control on-board power regulator through Power Monitor GUI

The Power Monitor GUI reports most power rails voltage, current, and power information on the board. You can fine-tune some regulators’ output voltage by Power Monitor GUI. It also collects temperature from FPGA SDM, FPGA core, E-Tile, P-tile, power modules and diode assembled on PCB.

The Power Monitor GUI communicates with system Intel® MAX® 10 through either USB port CN1 or J19. System Intel® MAX® 10 monitors and controls power regulator, temperature/voltage/current sensing chips through a 2-wire serial bus.

The instructions to run Power Monitor GUI are stated in the Running the BTS GUI section. It can also be started with the BTS GUI icon Power.

Attention: You cannot run the stand-alone power application when BTS or Clock Controller GUI is running at the same time.
Figure 20. Power Monitor GUI-1 (for the Intel Agilex® 7 DK-SI-AGF014EA and DK-SI-AGF014E3ES Development Kits)
Figure 21. Power Monitor GUI-2 (for the Intel Agilex® 7 DK-SI-AGF014EA and DK-SI-AGF014E3ES Development Kits)
Figure 22. Power Monitor GUI-3 (for the Intel Agilex® 7 DK-SI-AGF014EA and DK-SI-AGF014E3ES Development Kits)
Figure 23. Power Monitor GUI-4 (for the Intel Agilex® 7 DK-SI-AGF014EA and DK-SI-AGF014E3ES Development Kits)
Figure 24. Power Monitor GUI - 1 (for the Intel Agilex® 7 DK-SI-AGF014EB Development Kit)
Figure 25. Power Monitor GUI - 2 (for the Intel Agilex® 7 DK-SI-AGF014EB Development Kit)
Figure 26. Power Monitor GUI - 3 (for the Intel Agilex® 7 DK-SI-AGF014EB Development Kit)
Figure 27. Power Monitor GUI - 4 (for the Intel Agilex® 7 DK-SI-AGF014EB Development Kit)

Configuration

Speed Adjustment: Adjust the update rate of current curve

Select Data Source: Switch between different monitor targets

Vout Adjustment (mV): Fine tune each smart regulator module output within +/-7% range. Select Power Rail, fill in the box, and press the Set button.

Temperature

Board: PCB surface temperature near U31

SDM/E-tile/P-tile/Core: FPGA die internal temperature sense diode (TSD)

QSFP: Diode assembled on PCB and close to QSFP/QSFPDD modules

VID_1/VCCH/3.3V/VCCPT/VCCIO: regulator U54/U57/U53/U58/U59 internal TSD. No on-board current measurement circuit for 3.3V_PRE, 5V, VCC_BIAS, 1.8V, 2.5V and 1.2V

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