Early Power Estimator for Intel® Cyclone® 10 LP FPGAs User Guide

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ID 683743
Date 5/08/2017
Public
Document Table of Contents
Document Table of Contents x
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP 2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP 3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP 4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP x
1.1. Power Model Status 1.2. Document Revision History
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP x
2.1. System Requirements 2.2. Download and Install the Early Power Estimator 2.3. Estimating Power Consumption 2.4. Document Revision History
2.2. Download and Install the Early Power Estimator x
2.2.1. Changing the Macro Security Level in Microsoft Excel* 2003 2.2.2. Changing the Macro Security Level in Microsoft Excel* 2007 2.2.3. Changing the Macro Security Level in Microsoft Excel* 2010
2.3. Estimating Power Consumption x
2.3.1. Estimating Power Consumption Before Starting the FPGA Design 2.3.2. Estimating Power Consumption While Creating the FPGA Design 2.3.3. Estimating Power Consumption After Completing the FPGA Design
2.3.1. Estimating Power Consumption Before Starting the FPGA Design x
2.3.1.1. Entering Information into the Early Power Estimator 2.3.1.2. Manually Entering Values
2.3.2. Estimating Power Consumption While Creating the FPGA Design x
2.3.2.1. Importing a File 2.3.2.2. Generating the Early Power Estimator (EPE) File 2.3.2.3. Importing Data into the Early Power Estimator (EPE) Spreadsheet
3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP x
3.1. Cyclone® 10 LP EPE - Main Worksheet 3.2. Cyclone® 10 LP EPE - Logic Worksheet 3.3. Cyclone® 10 LP EPE - RAM Worksheet 3.4. Cyclone® 10 LP EPE - DSP Worksheet 3.5. Cyclone® 10 LP EPE - I/O Worksheet 3.6. Cyclone® 10 LP EPE - PLL Worksheet 3.7. Cyclone® 10 LP EPE - Clock Worksheet 3.8. Cyclone® 10 LP EPE - Report Worksheet 3.9. Cyclone® 10 LP EPE - Enpirion Worksheet 3.10. Document Revision History
3.1. Cyclone® 10 LP EPE - Main Worksheet x
3.1.1. Input Parameters 3.1.2. Thermal Power 3.1.3. Power Tree Design 3.1.4. Thermal Analysis
3.1.4. Thermal Analysis x
3.1.4.1. Not Using a Heat Sink 3.1.4.2. Using a Heat Sink
3.8. Cyclone® 10 LP EPE - Report Worksheet x
3.8.1. Static Power and Dynamic Current per Voltage Rail 3.8.2. Power Up Current 3.8.3. Power Breakout for Multiple Voltage Supplies 3.8.4. Power Regulator Settings
4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP x
4.1. Toggle Rate 4.2. Airflow 4.3. Temperature 4.4. Heat Sink 4.5. Document Revision History
1. Overview of the Early Power Estimator for Intel® Cyclone® 10 LP
2. Setting Up the Early Power Estimator for Intel® Cyclone® 10 LP
3. Early Power Estimator Worksheets for Intel® Cyclone® 10 LP
4. Factors Affecting the Accuracy of the Early Power Estimator for Intel® Cyclone® 10 LP

4.1. Toggle Rate

The toggle rates specified in the Early Power Estimator (EPE) spreadsheet can have a large impact on the dynamic power consumption displayed. To obtain an accurate estimate, you must provide toggle rates that are realistic. Determining realistic toggle rates requires knowing what kind of input the FPGA is receiving and how often it toggles.

To get an accurate estimate if the design is not complete, isolate the separate modules in the design by function and estimate the resource usage along with the toggle rates of the resources. The easiest way to accomplish this is to leverage previous designs to estimate the toggle rates for modules with similar function.

The input data in the following figure is encoded for data transmission and has a roughly 50% toggle rate.

Figure 23. Decoder and Encoder Block Diagram
In this case, you must estimate the following:
  • Data toggle rate
  • Mod input toggle rate
  • Resource estimate for the Decoder module, RAM, Filter, Modulator, and Encoder
  • Toggle rate for the Decoder module, RAM, Filter, Modulator, and Encoder

You can generate these estimates in many ways. If you used similar modules in the past with data inputs of roughly the same toggle rate, you can leverage that information. If MATLAB simulations are available for some blocks, you can obtain the toggle rate information. If the HDL is available for some of the modules, you can simulate them.

If the HDL is complete, the best way to determine toggle rate is to simulate the design. The accuracy of toggle rate estimates depends on the accuracy of the input vectors. Therefore, determining whether or not the simulation coverage is high gives you a good estimate of how accurate the toggle rate information is.

The Quartus® Prime software can determine toggle rates of each resource used in the design if you provide information from simulation tools. Designs can be simulated in many different tools and the information provided to the Quartus® Prime software through a Signal Activity File (.saf). The Quartus® Prime Power Analyzer provides the most accurate power estimate. You can import the comma-separated value file (.csv) from the Quartus® Prime software into the EPE spreadsheet for estimating power after your design is complete.

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