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Ixiasoft
2.1. Processor Performance Benchmarks
FPGA Used | fMAX (MHz) | Logic Size (ALM) | Architecture Performance | |
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DMIPS/MHz Ratio | CoreMark/MHz Ratio | |||
Intel® Cyclone® 10 | 274.05 | 1350 | 0.572 | 0.402 |
Intel® Arria® 10 | 304.63 | 1382 | ||
Intel® Stratix® 10 | 373.55 | 1570 | ||
Intel® Agilex™ | 560.93 | 1523 |
FPGA Used | fMAX (MHz) | Logic Size | Architecture Performance | |
---|---|---|---|---|
DMIPS/MHz Ratio | CoreMark/MHz Ratio | |||
Intel® Cyclone® IV E | 139.63 | 2958 (LE) | 0.572 | 0.402 |
Intel® Cyclone® V | 162.1 | 1302.9 (ALM) | ||
Intel® Arria® V | 198.65 | 1308.5 (ALM) | ||
Intel® Arria® V GZ | 266.52 | 1263.9 (ALM) | ||
Intel® Stratix® V | 329.38 | 1280.3 (ALM) | ||
Intel® Cyclone® 10 LP | 134.44 | 2946 (LE) | ||
Intel® Arria® 10 | 325.41 | 1283.1 (ALM) | ||
Intel® MAX® 10 | 105.89 | 2997 (LE) |
Parameter | Settings/Description | |
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Intel® Quartus® Prime seed | Maximum performance result are based on 10 seed sweep from Intel® Quartus® Prime Pro Edition software version 22.3. | |
Device speed grade | Fastest speed grade from each Intel FPGA device family. | |
Defined peripherals |
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Toolchain | Version |
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Compiler configuration |
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Intel uses the same Intel® Quartus® Prime design example for maximum performance benchmark(fMAX) and logic size benchmarks. However, the compiler settings are different for each benchmarks:
- fMAX benchmark: superior_performance_optimized_placement_effort
- Logic size benchmark: area_aggressive
Note: Results may vary depending on the version of the Intel® Quartus® Prime software, the version of the Nios® V processor, compiler version, target device and the configuration of the processor. Additionally, any changes to the system logic design might change the performance and LE usage. All results are generated from design built with Platform Designer.