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Ixiasoft
1.5.1. Install the Design Files
1.5.2. Analyze System Requirements
1.5.3. Start the Software and Open the Example Project
1.5.4. Create a New System
1.5.5. Define the System in
1.5.6. Integrate the System into the Project
1.5.7. Download the Hardware Design to the Target FPGA
1.5.8. Develop Software Using the SBT for Eclipse
1.5.9. Run the Program on Target Hardware
1.5.5.1. Specify Target FPGA and Clock Settings
1.5.5.2. Add the On-Chip Memory
1.5.5.3. Add the Processor Core
1.5.5.4. Add the JTAG UART
1.5.5.5. Add the Interval Timer
1.5.5.6. Add the System ID Peripheral
1.5.5.7. Add the PIO
1.5.5.8. Specify Base Addresses and Interrupt Request Priorities
1.5.5.9. Generate the System
Visible to Intel only — GUID: sss1409227483039
Ixiasoft
1.5.6.2. Add IP Variation File
You can add the IP File (.qip) to the your project by performing the following steps:
- On the Assignments menu, click Settings.
The Settings dialog box appears.
- Under Category, click Files.
The Files page appears.
- Next to File name, click the browse (...) button.
- In the Files of type list, select Script Files (*.tcl, *.sdc, *.qip).
- Browse to locate <design files directory>/first_nios2_system/synthesis/ first_nios2_system.qip and click Open to select the file.
- Click Add to include first_nios2_system.qip in the project.
- Click OK to close the Settings dialog box.