Multi Channel DMA Intel® FPGA IP for PCI Express Design Example User Guide

ID 683517
Date 4/17/2023
Public

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1.2. MCDMA IP Modes

The following table summarizes the MCDMA IP variants, IP mode and FPGA Development Kit board supported for design example hardware test.

Table 2.  MCDMA IP Modes and FPGA Development Kit for Design Examples
MCDMA IP IP Mode FPGA Development Kit Board for Design Example Hardware Test
PCI Express Application Data Width Application Clock Frequency
MCDMA H-Tile Gen3 x16 512 bits 250 MHz

Intel® Stratix® 10 GX H-Tile Production FPGA Development Kit

Intel® Stratix® 10 MX H-Tile Production FPGA Development Kit

Gen3 x8 256 bits 250 MHz
MCDMA P-Tile Gen4x16 512 bits

Intel® Stratix® 10 DX: 400/350/200/175 MHz

Intel Agilex® 7: 500/450/400/350/250/225/200/175 MHz

Intel® Stratix® 10 DX P-Tile Production FPGA Development Kit

Intel Agilex® 7 F-Series P-Tile ES0 FPGA Development Kit

Intel Agilex® 7 F-Series P-Tile Production FPGA Development Kit

Gen4 1x8

Gen4 2x8

256 bits

Intel® Stratix® 10 DX: 400/350/200/175 MHz

Intel Agilex® 7: 500/450/400/350/250/225/200/175 MHz

Gen3 x16 512 bits 250 MHz

Gen3 1x8

Gen3 2x8

256 bits 250 MHz
MCDMA R-Tile

Gen5 2x8, Gen4 x16

512 bits

500/475/450/425/400 MHz

Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV-AGI027RES

Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV-AGI027R1BES

Gen4 2x8, Gen3 x16, Gen3 2x8

512 bits

300/275/250 MHz

Gen4 2x8

256 bits

500/475/450/425/400 MHz

Gen3 2x8

256 bits

300/275/250 MHz

MCDMA F-Tile Gen4 1x16 512 bits 500/400/350/250/225/200/175 MHz

Intel Agilex® 7 F-Series F-Tile FPGA Development Kit DK-DEV-AGF027FES

Intel Agilex® 7 F-Series F-Tile FPGA Development Kit DK-DEV-AGF027F1ES

Gen4 1x8

Gen4 2x8

256 bits 500/400/350/250/225/200/175 MHz
Gen3 1x16 512 bits 250 MHz

Gen3 1x8

Gen3 2x8

256 bits 250 MHz
Note: Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV-AGI027RES R-tile A0 die revision supports only Gen5 2x8 / 512 bit, Gen4 2x8 / 512bits and Gen3 2x8 / 512 bits.
Note: Intel Agilex® 7 I-Series FPGA Development Kit DK-DEV-AGI027R1BES R-Tile B0 die revision supports all PCIe Hard IP Modes defined in MCDMA R-Tile row

For more information about MCDMA IP, refer to the Multi Channel DMA Intel FPGA IP for PCI Express User Guide.