Low Latency E-Tile 40G Ethernet Intel® FPGA IP User Guide

ID 683486
Date 7/12/2024
Public
Document Table of Contents

3.5.2. Ethernet Adaptation Flow

Refer to Loading a PMA Configuration and PMA Registers 0x200 to 0x203 Usage sections in the E-tile Transceiver PHY User Guide for more details on the adaptation flow and how to get started.

This adaptation flow assumes a valid Ethernet traffic.

  1. Assert tx_rst_n and rx_rst_n signals.
  2. Trigger PMA analog.
  3. Reload PMA settings and call PMA attribute sequencer on all lanes.
  4. Apply control status registers (CSR) reset.
  5. Deassert the tx_rst_n signal.
  6. If using a PMA configuration, load the PMA configuration using control status registers (CSR). This is loaded to the registers using PMA registers 0x200 to 0x203 1.
    1. Write 0x40143 = 0x80.
    2. Read 0x40144[0] until it changes to 1.
  7. Enable internal serial loopback 2 and run initial adaptation. Verify that the initial adaptation status is complete using interrupt code 0x0126 and data 0x0B00.
  8. Enable mission mode and disable internal serial loopback (skip this step if using internal serial loopback)2.
  9. Wait for valid data traffic on RX and then proceed to the next step.
  10. Run initial adaptation. Verify that the initial adaptation status is complete using interrupt code 0x0126 and data 0x0B00 (skip this step if using internal serial loopback).
  11. Run continuous adaptation 3.
  12. Deassert the rx_rst_n signal.
  13. Optional: Verify that the link status signal rx_aligned transitions high.
  14. Send packets.
1 Refer to Loading a PMA Configuration and PMA Registers 0x200 to 0x203 Usage.
2 For how to enable and disable internal serial loopback, refer to 0x0008: Internal Serial Loopback and Reverse Parallel Loopback Control.
3 During the continuous adaptation, the link partner must keep sending the data. If link goes down, the entire sequence must be repeated.