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1. Intel® High Level Synthesis Compiler Pro Edition User Guide
2. Overview of the Intel® High Level Synthesis (HLS) Compiler Pro Edition
3. Creating a High-Level Synthesis Component and Testbench
4. Verifying the Functionality of Your Design
5. Optimizing and Refining Your Component
6. Verifying Your IP with Simulation
7. Synthesize your Component IP with Quartus® Prime Pro Edition
8. Integrating your IP into a System
A. Reviewing the High-Level Design Reports (report.html)
B. Intel® HLS Compiler Pro Edition Restrictions
C. Intel® HLS Compiler Pro Edition User Guide Archives
D. Document Revision History for Intel® HLS Compiler Pro Edition User Guide
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8.2. Adding the HLS Compiler-Generated IP into a Platform Designer System
To use the HLS compiler-generated IP in a Platform Designer (formerly Qsys Pro) System, you must first add the directory to the IP search path or the IP Catalog.
In Platform Designer, if your HLS compiler-generated IP does not appear in the IP Catalog, perform the following tasks:
- In Quartus® Prime, click Tools > Options.
- In the Options dialog box, under Category, expand IP Settings and click IP Catalog Search Locations.
- in the IP Catalog Search Locations dialog box, add the path to the directory that contains the .ip file to IP Search Paths as <result>.prj/components/<component_name>/<component_name> .
- In IP Catalog, add your IP to the Platform Designer system by selecting it from the HLS project directory.
For more information about Platform Designer, refer to "Creating a System with Platform Designer" in Quartus® Prime Pro Edition User Guide: Platform Designer.
For an example of adding HLS compiler-generated IP to a Platform Designer systems, review the following tutorial: <quartus_installdir>/hls/examples/tutorials/usability/platform_designer_stitching.