Intel® MAX® 10 FPGA 10M50 Evaluation Kit User Guide

ID 683447
Date 1/11/2024
Public
Document Table of Contents

3.8.2. Pmod Connectors

The Intel® MAX® 10 10M50 Evaluation Kit features two Digilent Pmod™ compatible headers, which are used to connect low frequency, low I/O pin count peripheral modules.

The 12-pin version Pmod connector used in this kit provides 8 I/O signal pins. The peripheral module interface also encompasses a variant using I2C interface, and two or four wire MTE cables. The Pmod signals are connected to Bank 8.

Table 19.  Pmod A Pin Assignments, Signal Names and Functions
Schematic Signal Name Schematic Share Bus Signal Name Intel® MAX® 10 FPGA Pin Number I/O Standard Description
PMODA_D0 PMODA_IO0 A6 3.3 V In/Out
PMODA_D1 PMODA_IO1 E8 3.3 V In/Out
PMODA_D2 PMODA_IO2 B4 3.3 V In/Out
PMODA_D3 PMODA_IO3 A5 3.3 V In/Out
PMODA_D4 PMODA_IO4 B7 3.3 V In/Out
PMODA_D5 PMODA_IO5 E9 3.3 V In/Out
PMODA_D6 PMODA_IO6 A4 3.3 V In/Out
PMODA_D7 PMODA_IO7 B5 3.3 V In/Out
--- VCC --- 3.3 V Power
--- GND --- --- GND
Table 20.  Pmod B Pin Assignments, Signal Names and Functions
Schematic Signal Name Schematic Share Bus Signal Name Intel® MAX® 10 FPGA Pin Number I/O Standard Description
PMODB_D0 PMODB_IO0 C8 3.3 V In/Out
PMODB_D1 PMODB_IO1 D8 3.3 V In/Out
PMODB_D2 PMODB_IO2 A3 3.3 V In/Out
PMODB_D3 PMODB_IO3 A2 3.3 V In/Out
PMODB_D4 PMODB_IO4 B3 3.3 V In/Out
PMODB_D5 PMODB_IO5 C2 3.3 V In/Out
PMODB_D6 PMODB_IO6 B1 3.3 V In/Out
PMODB_D7 PMODB_IO7 B2 3.3 V In/Out
--- VCC --- 3.3 V Power
--- GND --- --- GND