Intel® MAX® 10 FPGA 10M50 Evaluation Kit User Guide

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ID 683447
Date 1/11/2024
Public
Document Table of Contents
Document Table of Contents x
1. Intel® MAX® 10 FPGA 10M50 Evaluation Kit Overview 2. Getting Started 3. Board Components A. Additional Information
1. Intel® MAX® 10 FPGA 10M50 Evaluation Kit Overview x
1.1. Board Component Blocks 1.2. Supported Items Not Included with the Kit
2. Getting Started x
2.1. Powering the Kit 2.2. Installing the Intel® FPGA Download Cable II Driver 2.3. Handling the Kit 2.4. Factory Default Switch and Jumper Settings
3. Board Components x
3.1. Board Overview 3.2. Featured Device: Intel® MAX® 10 FPGA 3.3. Configuration 3.4. Status Elements 3.5. Setup Elements 3.6. General User Input/Output 3.7. Clock Circuitry 3.8. Components and Interfaces
3.3. Configuration x
3.3.1. Using the Intel® Quartus® Prime Programmer 3.3.2. Selecting the Internal Configuration Scheme
3.7. Clock Circuitry x
3.7.1. On-Board Oscillators 3.7.2. Off-Board Clock Input/Output 3.7.3. Clock Control GUI
3.7.3. Clock Control GUI x
3.7.3.1. The Clock Control
3.8. Components and Interfaces x
3.8.1. HDMI Video Output 3.8.2. Pmod Connectors 3.8.3. Memory 3.8.4. Flash 3.8.5. MIPI CSI-2 Transmitter 3.8.6. MIPI CSI-2 Receiver 3.8.7. Power Supply
3.8.3. Memory x
3.8.3.1. LPDDR2
3.8.7. Power Supply x
3.8.7.1. Power Options 3.8.7.2. Power-Up Sequence
A. Additional Information x
A.1. Document Revision History for the Intel® MAX® 10 FPGA 10M50 Evaluation Kit User Guide A.2. Safety and Regulatory Information A.3. Compliance Information
A.2. Safety and Regulatory Information x
A.2.1. Safety Warnings A.2.2. Safety Cautions
1. Intel® MAX® 10 FPGA 10M50 Evaluation Kit Overview
2. Getting Started
3. Board Components
A. Additional Information

3.8.4. Flash

The Intel® MAX® 10 FPGA 10M50 Evaluation Kit provides a 512-Mb (megabit) quad SPI flash memory.

If you use the parallel flash loader (PFL) IP to program the quad SPI flash, you need to generate a .pof (Programmer Object File) to configure the device.

To generate a .pof file, follow these steps:

  1. Create a byte-order Quartus.ini file with the setting:

    PGMIO_SWAP_HEX_BYTE_DATA=ON.

  2. Copy the .ini file to the project root directory and open the project with the Intel® Quartus® Prime Standard Edition software.
  3. Open Convert Programming Files tool to generate the .pof file.
Table 22.  Default Memory Map of the 512-Mb Quad SPI Flash
Block Description Size (KB) Address Range
Board Test System Scratch 512 0x03F8.0000 - 0x03FF.FFFF
User Software 56640 0x0083.0000 - 0x03F7.FFFF
Factory Software 4096 0x0043.0000 - 0x0082.FFFF
Board Information 64 0x0002.0000 - 0x0002.FFFF
User Design Reset Vector 64 0x0000.0000 - 0x0000.FFFF
Table 23.  Flash Pin Assignments, Schematic Signal Names, and Functions
Board Reference (U23) Signal Name Device/Pin Number I/O standard Description
U23.7 FLASH_CSn Intel® MAX® 10/A8 3.3 V Chip select
U23.16 FLASH_CLK Intel® MAX® 10/A9 3.3 V Clock
U23.3 FLASH_RESETn

Intel® MAX® 10/B8

MAX II/U14

 3.3 V Reset
U23.15 FLASH_D0 Intel® MAX® 10/C9 3.3 V Address Bus
U23.8 FLASH_D1 Intel® MAX® 10/C10 3.3 V Address Bus
U23.9 FLASH_D2 Intel® MAX® 10/C11 3.3 V Address Bus
U23.1 FLASH_D3 Intel® MAX® 10/A7 3.3 V Address Bus
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