Intel® Stratix® 10 Embedded Memory User Guide

ID 683423
Date 4/25/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.4.4. Error Correction Code Truth Table

Table 6.  ECC Status Flags Truth Table for M20K
Eccstatus[1]e Eccstatus[0]ue Status
0 0 No error.
0 1 Illegal/Invalid.
1 0 A correctable error occurred and the error has been corrected at the outputs; however, the memory array has not been updated.
1 1 An uncorrectable error occurs and uncorrectable data appears at the outputs.
Figure 7. ECC Block Diagram for M20K Memory


Table 7.  ECC Status Flags Truth Table for eSRAM
C{7:0}_error_detect_0 C{7:0}_error_correct_0 Status
0 0 No error.
0 1 Illegal.
1 0 An error is detected but uncorrectable. The uncorrectable data appears at the outputs.
1 1 An error is detected and correctable. The error has been corrected at the outputs. The corrected data appears at the outputs but the memory array is not updated.