DSP Builder for Intel® FPGAs (Advanced Blockset): Handbook

ID 683337
Date 12/04/2023
Public

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Document Table of Contents

15.3.1.1. Implementing a SYCL Block

Procedure

  1. Ensure that the icpx executable is available on the system PATH.
  2. Place the SYCL block inside a primitive subsystem.
    Immediately after you add the block, it has no input and output ports.
  3. Open the user interface to specify an input source file and click Compile to generate hardware and compile the simulation library:
    Figure 154. Input Source File
    If the compilation is successful, the parsed output of icpx populates the block's input and output ports.
    Figure 155. SYCL Design
  4. Connect the block and use it.