Intel® Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 12/12/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

EDA_RTL_TEST_BENCH_RUN_FOR

Specifies the time duration for RTL simulation using third-party simulation.

Type

Time

Device Support

  • This setting can be used in projects targeting any Intel FPGA device family.

Syntax


set_global_assignment -name EDA_RTL_TEST_BENCH_RUN_FOR -section_id <section identifier> <value>
set_global_assignment -name EDA_RTL_TEST_BENCH_RUN_FOR -entity <entity name> -section_id <section identifier> <value>