Intel® Quartus® Prime Pro Edition Settings File Reference Manual

ID 683296
Date 12/12/2022
Public

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Document Table of Contents

SYNTH_TIMING_DRIVEN_SYNTHESIS

Allows synthesis to use timing information during synthesis to better optimize the design.

Type

Boolean

Device Support

  • Intel® Arria® 10
  • Intel® Cyclone® 10 GX
  • Intel® Stratix® 10

Notes

This assignment is included in the Analysis & Synthesis report.

This assignment supports synthesis wildcards.

Syntax


set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS <value>
set_global_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS -entity <entity name> <value>
set_instance_assignment -name SYNTH_TIMING_DRIVEN_SYNTHESIS -to <to> -entity <entity name> <value>

Example


set_global_assignment -name synth_timing_driven_synthesis on