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1. Nios II Custom Instruction Overview
2. Custom Instruction Hardware Interface
3. Custom Instruction Software Interface
4. Design Example: Cyclic Redundancy Check
5. Introduction to Nios® II Floating Point Custom Instructions
6. Nios II Floating Point Hardware 2 Component
7. Nios® II Floating Point Hardware (FPH1) Component
8. Document Revision History for Nios II Custom Instruction User Guide
4.1.1. Setting up the Environment for the CRC Example Design
4.1.2. Opening the Component Editor
4.1.3. Specifying the Custom Instruction Component Type
4.1.4. Displaying the Custom Instruction Block Symbol
4.1.5. Adding the CRC Custom Instruction HDL Files
4.1.6. Configuring the Custom Instruction Parameter Type
4.1.7. Setting Up the CRC Custom Instruction Interfaces
4.1.8. Configuring the Custom Instruction Signal Type
4.1.9. Saving and Adding the CRC Custom Instruction
4.1.10. Generating and Compiling the CRC Example System
6.1. Overview of the Floating Point Hardware 2 Component
6.2. Floating Point Hardware 2 IEEE 754 Compliance
6.3. IEEE 754 Exception Conditions with FPH2
6.4. Floating Point Hardware 2 Operations
6.5. Building the FPH2 Example Hardware
6.6. Building the FPH2 Example Software
6.7. FPH2 Implementation of GCC Options
6.8. Nios II FPH2 and the Newlib Library
6.9. C Macros for round(), fmins(), and fmaxs()
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2.1.3.1. Extended Custom Instruction Timing
All extended custom instruction port operations are identical to those for the combinational and multicycle custom instructions, with the exception of the n port.
The n port timing is the same as that of the dataa port. For example, for an extended variable multicycle custom instruction, the processor presents the extension index to the n port on the same rising edge of the clock at which start is asserted, and the n port remains stable during execution of the custom instruction.
The n port is not present in combinational and multicycle custom instructions.