Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000-N

Download PDF
ID 683186
Date 9/08/2020
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Board Monitoring through PLDM over MCTP SMBus 3. Board Monitoring through I2C SMBus 4. EEPROM Data Format 5. Document Revision History for Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000-N A. Example PLDM Command and Response Messages
1. Introduction x
1.1. About this Document 1.2. Overview 1.3. Root of Trust (RoT) 1.4. Secure Remote System Update 1.5. Power Sequence Management 1.6. Board Monitoring Through Sensors
2. Board Monitoring through PLDM over MCTP SMBus x
2.1. SMBus Interface Speed 2.2. MCTP Packetization Support 2.3. Supported Command Sets 2.4. PLDM Topology and Hierarchy
4. EEPROM Data Format x
4.1. MAC EEPROM 4.2. Field Replaceable Unit Identification (FRUID) EEPROM Access
1. Introduction
2. Board Monitoring through PLDM over MCTP SMBus
3. Board Monitoring through I2C SMBus
4. EEPROM Data Format
5. Document Revision History for Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000-N
A. Example PLDM Command and Response Messages

5. Document Revision History for Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000-N

Document Version Intel Acceleration Stack Version Changes
2020.09.08 1.3.1 Updated in accordance with the Intel Acceleration Stack 1.3.1 Version for Intel FPGA Programmable Acceleration Card N3000-N.
2020.06.15 1.3 Initial release.
Level Two Title