Board Management Controller User Guide: Intel FPGA Programmable Acceleration Card N3000-N

ID 683186
Date 9/08/2020
Public

2. Board Monitoring through PLDM over MCTP SMBus

The BMC on the Intel® FPGA PAC N3000-N communicates with a server BMC over the PCIe* SMBus.

The MCTP controller supports Platform Level Data Model (PLDM) over Management Component Transport Protocol (MCTP) stack. MCTP endpoint 8-bit slave address is 0xCE by default. This slave address can be modified and reprogrammed into a corresponding section of external FPGA Quad SPI flash via in-band way if necessary.

The Intel® FPGA PAC N3000-N BMC supports a subset of the PLDM and MCTP commands to enable a server BMC to obtain sensor data such as voltage, current and temperature.

Note: PLDM over MCTP SMBus endpoint is supported. PLDM over MCTP via native PCIe is not supported.
SMBus device category:
  • Fixed not Discoverable device is supported by default. Other device categories are not supported.

ACK-Poll is supported with SMBus default slave address 0xCE.