Intel Agilex® 7 SEU Mitigation User Guide

ID 683128
Date 4/10/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.4.1.3. Off-Chip Lookup Sensitivity Processing

For the off-chip sensitivity processing, the Advanced SEU Detection IP reads the error message queue content and presents the information to a system processor. The processor determines whether the failure affects the device operation. The system processor implements the algorithm to perform a lookup against the .smh file.
Figure 5. System Overview for Off-Chip Lookup Sensitivity Processing with Advanced SEU Detection IP


Figure 6. Process Flow for Off-Chip Lookup Sensitivity Processing