AN 802: Intel® Stratix® 10 SoC Device Design Guidelines
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4.1.1.1. HPS First and FPGA First Boot Considerations
Guideline: HPS First Boot Mode Utilizes Early I/O Release
Follow the guidelines in this document to properly design your board and the SoC device pin out for the HPS SDRAM interface for Early I/O Release.
For more information about the supported boot modes, refer to the Intel® Stratix® 10 SoC Boot User Guide and the "Boot and Configuration" section in the Intel® Stratix® 10 Hard Processor System Technical Reference Manual.