Serial Lite III Streaming Intel® Arria® 10 FPGA IP Design Example User Guide

ID 683055
Date 11/01/2021
Public

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2.4.1. Testbench

If your design targets Intel® Arria® 10 devices, the generated example testbench is dynamic and has the same configuration as the IP.

When you choose the sink or duplex direction, the parameter editor generates an external transceiver ATX PLL for use in the Intel® Arria® 10 testbench.

Figure 13. Serial Lite III Streaming Example Testbench (Duplex) for Intel® Arria® 10 Devices
Figure 14. Serial Lite III Streaming Example Testbench (Simplex) for Intel® Arria® 10 Devices