Serial Lite III Streaming Intel® Arria® 10 FPGA IP Design Example User Guide

ID 683055
Date 11/01/2021
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

1.3. Generating the Design

You can use the Serial Lite III Streaming IP core parameter editor in the Intel® Quartus® Prime software to generate the design example.
Figure 4. Procedure
Figure 5. Example Design Tab