Serial Lite III Streaming Intel® Arria® 10 FPGA IP Design Example User Guide

ID 683055
Date 11/01/2021
Public

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Document Table of Contents

3.3.1. Design Example Components

The design example consists of following components:

  • Serial Lite III Streaming IP core variation
  • ATX PLL
  • Source user clock—I/O PLL
  • Traffic generator
  • Traffic checker
  • Demo control
  • Demo management
  • Nios II processor code