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1.1. Introduction to Custom Platforms
1.2. OpenCL System Architecture
1.3. Hierarchical Structure of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform's Hardware
1.4. Intel® Quartus® Prime Software Revisions Describing the Custom Platform
1.5. Intel® FPGA SDK for OpenCL™ and User Environment Setup
1.6. Intel® Arria® 10 Custom Platform Project Setup and Customization Procedure
1.7. Intel® Arria® 10 Custom Platform Customization Example
1.8. Updating Your Custom Platform to Target a Different Device
1.9. Migrating the Custom Platform between Different Intel® Quartus® Prime Software Versions
1.10. Document Revision History for Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*
1.7.1. Modifying the board.qsys File in the Custom Platform
1.7.2. Modifying the Kernel (freeze_wrapper.v and board_spec.xml)
1.7.3. Updating the Top-Level I/O Ring with the Modified board.qsys and freeze_wrapper.v Files
1.7.4. Updating the Original Custom Platform Directory with the New Custom Platform Modifications
1.7.5. Compilation Log Files
1.7.6. Analyzing the Results from Compilation
1.7.1.1. Opening an Existing Intel® Quartus® Prime Project and the board.qsys Platform Designer System Design
1.7.1.2. Adding the Avalon® -ST Single Clock FIFO Component into the Platform Designer System
1.7.1.3. Connecting the Avalon® -ST Single Clock FIFO Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.1. Opening an Existing Intel® Quartus® Prime Project and the kernel_system.qsys Platform Designer System Design
1.7.2.2. Adding an Avalon® -ST Adapter Component into the Platform Designer System
1.7.2.3. Connecting the Avalon® -ST Adapter Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.4. Modifying the board_spec.xml File
1.7.2.5. Modifying the freeze_wrapper.v File
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1.6.3. Customization Flow
The Intel® Arria® 10 Custom Platform customization flow involves compiling an existing Reference Platform and the modifying the Reference Platform according to your specifications.
The customization flow has five steps:
- Check default Reference or Custom Platform with a standard OpenCL kernel.
- Set up project for customization.
- Add components to Custom Platform, including kernel and I/O ring.
- Check compilation results and debug.
- Update Custom Platform with modified files.
The following sections describe how to compile the original Reference Platform with and without platform regeneration and also without any customization. Performing these compilations checks the Intel® FPGA SDK for OpenCL™ environment and project setup.
- Compiling a Kernel without Regenerating the Custom Platform
Step 1 in the Intel® Arria® 10 Custom Platform customization flow is to verify the functionality of the existing Reference Platform by compiling it with a simple OpenCL kernel but without regenerating the platform. - Preparing an Existing Custom Platform for Customization
Step 2 in the Intel® Arria® 10 Custom Platform Customization Flow is to prepare the Custom Platform for customization.