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1.1. Introduction to Custom Platforms
1.2. OpenCL System Architecture
1.3. Hierarchical Structure of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform's Hardware
1.4. Intel® Quartus® Prime Software Revisions Describing the Custom Platform
1.5. Intel® FPGA SDK for OpenCL™ and User Environment Setup
1.6. Intel® Arria® 10 Custom Platform Project Setup and Customization Procedure
1.7. Intel® Arria® 10 Custom Platform Customization Example
1.8. Updating Your Custom Platform to Target a Different Device
1.9. Migrating the Custom Platform between Different Intel® Quartus® Prime Software Versions
1.10. Document Revision History for Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*
1.7.1. Modifying the board.qsys File in the Custom Platform
1.7.2. Modifying the Kernel (freeze_wrapper.v and board_spec.xml)
1.7.3. Updating the Top-Level I/O Ring with the Modified board.qsys and freeze_wrapper.v Files
1.7.4. Updating the Original Custom Platform Directory with the New Custom Platform Modifications
1.7.5. Compilation Log Files
1.7.6. Analyzing the Results from Compilation
1.7.1.1. Opening an Existing Intel® Quartus® Prime Project and the board.qsys Platform Designer System Design
1.7.1.2. Adding the Avalon® -ST Single Clock FIFO Component into the Platform Designer System
1.7.1.3. Connecting the Avalon® -ST Single Clock FIFO Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.1. Opening an Existing Intel® Quartus® Prime Project and the kernel_system.qsys Platform Designer System Design
1.7.2.2. Adding an Avalon® -ST Adapter Component into the Platform Designer System
1.7.2.3. Connecting the Avalon® -ST Adapter Component's Exported Signals in the Top-Level Platform Designer System
1.7.2.4. Modifying the board_spec.xml File
1.7.2.5. Modifying the freeze_wrapper.v File
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1.6.3.2. Preparing an Existing Custom Platform for Customization
Step 2 in the Intel® Arria® 10 Custom Platform Customization Flow is to prepare the Custom Platform for customization. Before customizing your Custom Platform, make a copy of the existing platform to keep the original platform settings intact.
Intel assumes that you have completed the steps outlined in the Compiling a Kernel (vector_add.cl) without Regenerating the Custom Platform section.
To set up the project for customization, perform the following tasks:
- Make a copy of the a10gx_ref_18.1/hardware/a10gx directory.
- Rename the copied directory from a10gx to a10gx_fifo. This new directory will contain any new files and changes resulted from the customization.
- Open the a10gx_ref_18.1/board_env.xml file in a text editor and perform the following tasks:
- Change the board default setting from a10gx_es3 to a10gx_fifo.
- Save and then close the board_env.xml file.
- Open the a10gx_ref_18.1/hardware/a10gx_fifo/board_spec.xml file a text editor and perform the following tasks:
- Change the board name setting from a10gx_es3 to a10gx_fifo.
- Save and then close the board_spec.xml file.
- Navigate to the a10gx_ref_18.1 project directory and invoke the aoc vector_add.cl –v --no-interleaving default command.
- After the compilation is completed, you can review the resulting files in the vector_add directory within your working directory.
- Refer to the Analyzing the Results from Compilation section to check the Fitter, Timing Analyzer reports and placement in the Floorplanner.