AN 780: Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*

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ID 683045
Date 10/30/2018
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Document Table of Contents
Document Table of Contents x
1. Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL
1. Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL x
1.1. Introduction to Custom Platforms 1.2. OpenCL System Architecture 1.3. Hierarchical Structure of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform's Hardware 1.4. Intel® Quartus® Prime Software Revisions Describing the Custom Platform 1.5. Intel® FPGA SDK for OpenCL™ and User Environment Setup 1.6. Intel® Arria® 10 Custom Platform Project Setup and Customization Procedure 1.7. Intel® Arria® 10 Custom Platform Customization Example 1.8. Updating Your Custom Platform to Target a Different Device 1.9. Migrating the Custom Platform between Different Intel® Quartus® Prime Software Versions 1.10. Document Revision History for Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL*
1.4. Intel® Quartus® Prime Software Revisions Describing the Custom Platform x
1.4.1. Descriptions of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform Files
1.4.1. Descriptions of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform Files x
1.4.1.1. Location of the Intel® Arria® 10 GX FPGA Development Kit Reference Platform
1.5. Intel® FPGA SDK for OpenCL™ and User Environment Setup x
1.5.1. Specifying the Intel® FPGA SDK for OpenCL™ User Environment Variable Settings 1.5.2. Specifying the Intel® FPGA SDK for OpenCL™ User Environment Variables on Linux
1.5.1. Specifying the Intel® FPGA SDK for OpenCL™ User Environment Variable Settings x
1.5.1.1. Verifying the Windows Intel® FPGA SDK for OpenCL™ User Environment Variable Settings
1.5.2. Specifying the Intel® FPGA SDK for OpenCL™ User Environment Variables on Linux x
1.5.2.1. Verifying the Linux Intel® FPGA SDK for OpenCL™ User Environment Variable Settings
1.6. Intel® Arria® 10 Custom Platform Project Setup and Customization Procedure x
1.6.1. Custom Platform Versioning 1.6.2. Board XML Files 1.6.3. Customization Flow
1.6.2. Board XML Files x
1.6.2.1. The board_env.xml File 1.6.2.2. The board_spec.xml File
1.6.2.1. The board_env.xml File x
1.6.2.1.1. Creating the board_env.xml File
1.6.2.2. The board_spec.xml File x
1.6.2.2.1. Creating the board_spec.xml File
1.6.3. Customization Flow x
1.6.3.1. Compiling a Kernel without Regenerating the Custom Platform 1.6.3.2. Preparing an Existing Custom Platform for Customization
1.7. Intel® Arria® 10 Custom Platform Customization Example x
1.7.1. Modifying the board.qsys File in the Custom Platform 1.7.2. Modifying the Kernel (freeze_wrapper.v and board_spec.xml) 1.7.3. Updating the Top-Level I/O Ring with the Modified board.qsys and freeze_wrapper.v Files 1.7.4. Updating the Original Custom Platform Directory with the New Custom Platform Modifications 1.7.5. Compilation Log Files 1.7.6. Analyzing the Results from Compilation
1.7.1. Modifying the board.qsys File in the Custom Platform x
1.7.1.1. Opening an Existing Intel® Quartus® Prime Project and the board.qsys Platform Designer System Design 1.7.1.2. Adding the Avalon® -ST Single Clock FIFO Component into the Platform Designer System 1.7.1.3. Connecting the Avalon® -ST Single Clock FIFO Component's Exported Signals in the Top-Level Platform Designer System
1.7.2. Modifying the Kernel (freeze_wrapper.v and board_spec.xml) x
1.7.2.1. Opening an Existing Intel® Quartus® Prime Project and the kernel_system.qsys Platform Designer System Design 1.7.2.2. Adding an Avalon® -ST Adapter Component into the Platform Designer System 1.7.2.3. Connecting the Avalon® -ST Adapter Component's Exported Signals in the Top-Level Platform Designer System 1.7.2.4. Modifying the board_spec.xml File 1.7.2.5. Modifying the freeze_wrapper.v File
1.8. Updating Your Custom Platform to Target a Different Device x
1.8.1. Targeting a Device that Has a Migration Path in the Intel® Quartus® Prime Software 1.8.2. Targeting a Device that Has a Different Package Size
1.9. Migrating the Custom Platform between Different Intel® Quartus® Prime Software Versions x
1.9.1. Custom Platform Automigration for Forward Compatibility 1.9.2. Customizing Automigration 1.9.3. Overall Summary
1. Compiling and Customizing an Intel® Arria® 10 Custom Platform for OpenCL

1.5.1. Specifying the Intel® FPGA SDK for OpenCL™ User Environment Variable Settings

You have the option to set the Windows user environment variables permanently or transiently.
  • To apply the environment variable settings permanently on your system, set them in the Environment Variable dialog box via the System Properties (Advanced) tab.
    Table 3.   Intel® FPGA SDK for OpenCL™ Windows User Environment Variable Settings
    Environment Variable Path to Include
    PATH
    1. %INTELFPGAOCLSDKROOT%\bin
    2. %INTELFPGAOCLSDKROOT%\host\windows64\bin

    where INTELFPGAOCLSDKROOT points to the path of the software installation

    AOCL_BOARD_PACKAGE_ROOT Location of Custom or Reference Platform
  • To apply transient environment variable settings, open a command window and run the %INTELFPGAOCLSDKROOT%\init_opencl.bat script.
    Example script output: 
    AOCL_BOARD_PACKAGE_ROOT path is not set in environment
Setting to default s5_ref board.
If you want to target another board, do 
set AOCL_BOARD_PACKAGE_ROOT=board_pkg_dir and re-run this script
Adding %INTELFPGAOCLSDKROOT%\bin to PATH
Adding %INTELFPGAOCLSDKROOT%\host\windows64\bin to PATH
Adding %AOCL_BOARD_PACKAGE_ROOT%\windows64\bin to PATH

Section Content
Verifying the Windows Intel FPGA SDK for OpenCL User Environment Variable Settings

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