Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide

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ID 812857
Date 1/08/2023
Public
Document Table of Contents
Document Table of Contents x
1. Overview 2. Getting Started 3. Board Components 4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide A. Additional Information
1. Overview x
1.1. Board Component Blocks 1.2. Supported Items Not Included with the Kit
2. Getting Started x
2.1. Powering the Kit 2.2. Installing the Intel® FPGA Download Cable Driver 2.3. Handling the Kit 2.4. Factory Default Switch and Jumper Settings
3. Board Components x
3.1. Board Overview 3.2. Featured Device: Intel® MAX® 10 FPGA 3.3. Configuration 3.4. Clock Circuitry 3.5. Arduino Connectors 3.6. General User Input/Output 3.7. Power Supply
3.3. Configuration x
3.3.1. FPGA Programming over External Intel® FPGA Download Cable 3.3.2. Configuring the FPGA Using the Intel® Quartus® Prime Programmer 3.3.3. Selecting Internal Configuration Scheme 3.3.4. Generating a .pof File with ICB Settings 3.3.5. Programming Internal Flash Memory
3.4. Clock Circuitry x
3.4.1. General-Purpose Clock
3.6. General User Input/Output x
3.6.1. User-Defined DIP Switch 3.6.2. User-Defined LEDs
3.7. Power Supply x
3.7.1. Power Measurement 3.7.2. Power Distribution System 3.7.3. Temperature Sense
A. Additional Information x
A.1. Safety and Regulatory Information A.2. Compliance Information
A.1. Safety and Regulatory Information x
A.1.1. Safety Warnings A.1.2. Safety Cautions
1. Overview
2. Getting Started
3. Board Components
4. Document Revision History for Intel® MAX® 10 FPGA (10M08S, 144-EQFP) Evaluation Kit User Guide
A. Additional Information

3.3.2. Configuring the FPGA Using the Intel® Quartus® Prime Programmer

You can use the Intel® Quartus® Prime Programmer to configure the FPGA with a .sof. Before configuring the FPGA, ensure that the Intel® Quartus® Prime Programmer and the Intel® FPGA Download Cable driver are installed on the host computer, the USB cable is connected to the evaluation kit, power to the board is on, and no other applications that use the JTAG chain are running.

To successfully use the Intel® FPGA Download Cable cable, you must disconnect it before power cycling the board. After you power cycled the board, then reconnect the Intel® FPGA Download Cable cable.

To configure the Intel® MAX® 10 FPGA, perform the following steps:

  1. Start the Intel® Quartus® Prime Programmer.
  2. Click Auto Detect to display the devices in the JTAG chain.
  3. Click Add File and select the path to the desired .sof.
  4. Turn on the Program/Configure option for the added file.
  5. Click Start to download the selected file to the FPGA. Configuration is complete when the progress bar reaches 100%.
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