3.5. Arduino Connectors
Arduino connectors J3, J4, and J5 connect to the Intel® MAX® 10 FPGA. Any analog inputs signals sourced through the Arduino header J4 are first filtered by the evaluation boards op-amp based circuit. This circuit scales the maximum allowable voltage per the Arduino specification (5.0 V) to the maximum allowable voltage per the Intel® MAX® 10 FPGA ADC IP block (2.5 V).
You can download an example design with pin locations and assignments completed according to the following table from the FPGA Design Store. In the Intel® MAX® 10 FPGA Evaluation Kit, under Design Examples, click Intel® MAX® 10 Evaluation Kit Baseline Pinout.
Board Reference | Schematic Signal Name | Intel® MAX® 10 FPGA Device Pin Number | Description |
---|---|---|---|
J3.1 | ANALOG_VREF | 5 | Arduino analog Vref input |
J3.2 | GND | — | Arduino GND input |
J3.3 | ARDUINO_IO13 | 70 | Arduino digital I/O input to FPGA |
J3.4 | ARDUINO_IO12 | 69 | Arduino digital I/O input to FPGA |
J3.5 | ARDUINO_IO11 | 66 | Arduino digital I/O input to FPGA |
J3.6 | ARDUINO_IO10 | 65 | Arduino digital I/O input to FPGA |
J3.7 | ARDUINO_IO9 | 64 | Arduino digital I/O input to FPGA |
J3.8 | ARDUINO_IO8 | 62 | Arduino digital I/O input to FPGA |
J4.1 | ARDUINO_A0 | 6 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADCIN1 |
J4.2 | ARDUINO_A1 | 7 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN2 |
J4.3 | ARDUINO_A2 | 8 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN3 |
J4.4 | ARDUINO_A3 | 10 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN4 |
J4.5 | ARDUINO_A4 | 11 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN5 |
J4.6 | ARDUINO_A5 | 12 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN6 |
J4.7 | ARDUINO_A6 | 13 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN7 |
J4.8 | ARDUINO_A7 | 14 | Arduino analog channel input through the op-amp filter circuit to the FPGA ADC IP input channel ADC1IN8 |
J5.1 | ARDUINO_IO7 | 86 | Arduino digital I/O input to FPGA |
J5.2 | ARDUINO_IO6 | 84 | Arduino digital I/O input to FPGA |
J5.3 | ARDUINO_IO5 | 81 | Arduino digital I/O input to FPGA |
J5.4 | ARDUINO_IO4 | 79 | Arduino digital I/O input to FPGA |
J5.5 | ARDUINO_IO3 | 77 | Arduino digital I/O input to FPGA |
J5.6 | ARDUINO_IO2 | 76 | Arduino digital I/O input to FPGA |
J5.7 | ARDUINO_IO1 | 75 | Arduino digital I/O input to FPGA |
J5.8 | ARDUINO_IO0 | 74 | Arduino digital I/O input to FPGA |