Intel® Simics® Simulator for Intel® FPGAs: User Guide

Download PDF
ID 784383
Date 12/04/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents
Document Table of Contents x
1. About This Document 2. Intel® Simics® Simulator and Virtual Platforms 3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio 4. Installing the Intel® Simics® Simulator for Intel® FPGAs 5. Getting Started with Intel® Simics® Simulator 6. Debugging Target Software 7. Networking with the Simulated Target System 8. Intel® Simics® Scripting 9. Software Debug Examples with Intel® Simics® Simulator 10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide A. Intel® Simics® Simulator Command Reference
1. About This Document x
1.1. Documentation Conventions for Examples 1.2. Terminology 1.3. List of Acronyms
2. Intel® Simics® Simulator and Virtual Platforms x
2.1. Device Model and Virtual Platforms 2.2. Intel® Simics® Simulator 2.3. Intel® Simics® Simulator Architecture
2.2. Intel® Simics® Simulator x
2.2.1. Intel® Simics® Simulator for Intel FPGAs Capabilities
4. Installing the Intel® Simics® Simulator for Intel® FPGAs x
4.1. Installing the Intel® Simics® Simulator for Intel® FPGAs on Linux* Systems 4.2. Installing the Intel® Simics® Simulator for Intel® FPGAs on Microsoft Windows* Systems 4.3. Installing Ashling* RiscFree* IDE for Intel® FPGAs 4.4. Intel® Simics® Simulator for Intel® FPGAs Support
5. Getting Started with Intel® Simics® Simulator x
5.1. Simulation Set Up 5.2. Starting the Simulation 5.3. Intel® Simics® Simulator Command-Line Interface (CLI) 5.4. Hardware Inspection 5.5. Intel® Simics® Simulator Timing
5.1. Simulation Set Up x
5.1.1. Initializing an Intel® Simics® Project and Deploying a Virtual Platform 5.1.2. Understanding Target Scripts
5.2. Starting the Simulation x
5.2.1. Starting a Simulation from a Command Prompt 5.2.2. Starting a Simulation with Ashling* RiscFree* IDE
5.3. Intel® Simics® Simulator Command-Line Interface (CLI) x
5.3.1. Version of the Intel® Simics® Simulator for Intel FPGAs Software 5.3.2. Simulation Run Control from CLI 5.3.3. Intel® Simics® Simulator Command Scope 5.3.4. Intel® Simics® Simulator CLI Variables and Operations 5.3.5. Intel® Simics® Simulator CLI Command Completion and Command History 5.3.6. Intel® Simics® Command-Line Interface Help 5.3.7. Capture of CLI Session to a File 5.3.8. Intel® Simics® Simulator File Location and Intel® Simics® Search Path
5.4. Hardware Inspection x
5.4.1. Listing Objects in the Target System 5.4.2. Processor (CPU) Inspection 5.4.3. Device Inspection 5.4.4. Memory Mapping and Memory Inspection 5.4.5. Logging
5.4.2. Processor (CPU) Inspection x
5.4.2.1. Listing Processors 5.4.2.2. Inspect Processor Registers
5.4.3. Device Inspection x
5.4.3.1. Retrieve List of Devices 5.4.3.2. Inspecting Device Registers
5.4.4. Memory Mapping and Memory Inspection x
5.4.4.1. Memory Mapping Inspection 5.4.4.2. Memory Inspection
5.4.5. Logging x
5.4.5.1. Breakpoints on CLI Log Messages
5.5. Intel® Simics® Simulator Timing x
5.5.1. CPU Frequency 5.5.2. CPU Cycles and Steps 5.5.3. Events 5.5.4. Enable Real Time
6. Debugging Target Software x
6.1. Intel® Simics® Debugger and Debug Context 6.2. Capturing Serial Console Output 6.3. Breakpoints 6.4. Debugging Target Software with Symbol Files 6.5. Debugging Target Software with Ashling* RiscFree* Debugger 6.6. Capturing CPU Instruction Execution Trace
6.3. Breakpoints x
6.3.1. Memory Breakpoints 6.3.2. Temporal Breakpoints 6.3.3. CPU Control Register Breakpoints 6.3.4. Hardware Access Breakpoints 6.3.5. CPU Register Breakpoints 6.3.6. Tracing Breakpoints 6.3.7. Text Console Activity Breakpoints
6.4. Debugging Target Software with Symbol Files x
6.4.1. Loading Symbol Files in a Simulation
6.5. Debugging Target Software with Ashling* RiscFree* Debugger x
6.5.1. Remote Debugging with RiscFree* IDE
6.5.1. Remote Debugging with RiscFree* IDE x
6.5.1.1. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on the Same System 6.5.1.2. Remote Debugging With Intel® Simics® Simulation and RiscFree* IDE on Different Systems 6.5.1.3. Remote Access to the Target System Serial Console
7. Networking with the Simulated Target System x
7.1. Network Simulation and Service Node 7.2. Connectivity Between Host PC and Target System
7.2. Connectivity Between Host PC and Target System x
7.2.1. Port Forwarding 7.2.2. Transferring Files Between Host PC and Target System 7.2.3. Accessing Target System from Host PC Through HTTP 7.2.4. Networking Commands Reference Table
7.2.1. Port Forwarding x
7.2.1.1. Incoming Port Forwarding 7.2.1.2. Outgoing Port Forwarding
7.2.1.1. Incoming Port Forwarding x
7.2.1.1.1. Example of an SSH Connection with Incoming Port Forwarding
7.2.1.2. Outgoing Port Forwarding x
7.2.1.2.1. Example of SSH Connection With Outgoing Port Forwarding 7.2.1.2.2. Example of SSH Connection via NAPT
7.2.2. Transferring Files Between Host PC and Target System x
7.2.2.1. Transferring Files with SCP service 7.2.2.2. Transferring Files with TFTP service
7.2.2.1. Transferring Files with SCP service x
7.2.2.1.1. Transferring Files With SCP Service via Forwarding Ports 7.2.2.1.2. Transferring Files with SCP from Target System to Host PC via NAPT
7.2.2.2. Transferring Files with TFTP service x
7.2.2.2.1. TFTP Using Forwarding Port 7.2.2.2.2. TFTP via NAPT 7.2.2.2.3. TFTP Using TFTP Server in Intel® Simics® Service Node
8. Intel® Simics® Scripting x
8.1. Scripts in CLI
8.1. Scripts in CLI x
8.1.1. Variables 8.1.2. Command Return Values 8.1.3. Control Flow Commands 8.1.4. Local Variables 8.1.5. Integer Conversion 8.1.6. Accessing Configuration Parameters 8.1.7. Error Handling in Scripts 8.1.8. Script Branches
8.1.8. Script Branches x
8.1.8.1. Script Branches Commands 8.1.8.2. Variables in Script Branches 8.1.8.3. Branch Synchronization 8.1.8.4. Canceling Script Branches 8.1.8.5. Script Branches Restrictions
9. Software Debug Examples with Intel® Simics® Simulator x
9.1. Debugging Linux* User-Mode Application
9.1. Debugging Linux* User-Mode Application x
9.1.1. Debugging a Linux Application with GDB 9.1.2. Debugging a Linux Application with RiscFree* IDE
9.1.1. Debugging a Linux Application with GDB x
9.1.1.1. Debugging with GDB Debug from Host PC Using Forwarding Ports 9.1.1.2. Debugging with GDB from Host PC with Intel® Simics® Simulator GDB Server
1. About This Document
2. Intel® Simics® Simulator and Virtual Platforms
3. Intel® Simics® Simulator for Intel® FPGAs Device Portfolio
4. Installing the Intel® Simics® Simulator for Intel® FPGAs
5. Getting Started with Intel® Simics® Simulator
6. Debugging Target Software
7. Networking with the Simulated Target System
8. Intel® Simics® Scripting
9. Software Debug Examples with Intel® Simics® Simulator
10. Document Revision History for Intel® Simics® Simulator for Intel FPGAs User Guide
A. Intel® Simics® Simulator Command Reference

5.4.2.2. Inspect Processor Registers

You can inspect the registers and current execution mode of a processor by using the print processor-registers command (pregs is the alias command). This command returns all registers for the processor core queried. By default, this prints the registers of the current processor selected (psel). 

# Intel Simics simulator CLI 

simics> agilex.hps.core[0].print-processor-registers
aarch64
x0    = 0x0000000000000000  x16   = 0x0000000000000000
x1    = 0x0000000000000000  x17   = 0x0000000000000000
x2    = 0x0000000000000000  x18   = 0x0000000000000000
x3    = 0x0000000000000000  x19   = 0x0000000000000000
x4    = 0x0000000000000000  x20   = 0x0000000000000000
x5    = 0x0000000000000000  x21   = 0x0000000000000000
x6    = 0x0000000000000000  x22   = 0x0000000000000000
x7    = 0x0000000000000000  x23   = 0x0000000000000000
x8    = 0x0000000000000000  x24   = 0x0000000000000000
x9    = 0x0000000000000000  x25   = 0x0000000000000000
x10   = 0x0000000000000000  x26   = 0x0000000000000000
x11   = 0x0000000000000000  x27   = 0x0000000000000000
x12   = 0x0000000000000000  x28   = 0x0000000000000000
x13   = 0x0000000000000000  x29   = 0x0000000000000000
x14   = 0x0000000000000000  x30   = 0x0000000000000000
x15   = 0x0000000000000000

pc = 0x0000000000000000

sp :
sp_el0 = 0x0000000000000000 sp_el2 = 0x0000000000000000
sp_el1 = 0x0000000000000000 sp_el3 = 0x0000000000000000

pstate : 00000000000000000000001111001101
         NZCV----UPSI----------DAIF-nEE-S
                 AASL               RLL P
                 ON                 W
:
:
hcr_el2 = 0x0000000000000000 : 0000000000000000000000000000000000000000000000000000000000000000
                               -------------------------MTTTEICRTHTTTTTTTTTTTTTTTTDB FVVVAIFPSV
                                                        IEEL2DDWRCDGVTPPSAISIIIIWWCS BSIFMMMTWM
                                                        OAROH   VDZEMLUCwCDCDDDDEI U  E  OOOWI
                                                        C RR    M    B   RC 3210             O
                                                        N                 P
                                                        C
                                                        E

When used pregs –all command, this prints information of additional registers such as control and floating point registers.

You can print the value of one processor register by entering the %[register name] command. 
# Intel Simics simulator CLI 

# Printing the value of register “x11” using %reg:
simics> %x11
0

# Printing the value of register “x11” using [processor_path].read-reg:
simics> agilex.hps.core[1].read-reg x11
0

# Changing output to the hexadecimal by using “output-radix 16”, options are 2, 8, 10, and 16.
simics> output-radix 16
simics> %x11
0x0

Intel® Simics® simulator allows you to modify the register value by using the [processor_path].write-reg command. This can be done at any time during the simulation and without depending on the embedded software for this. 

# Intel Simics simulator CLI 

# Writing a value into a processor register, in this case, writing 0x2801111 to the reg x8 of agilex.hps.core[1]

simics> agilex.hps.core[1].write-reg x8 0x2801111

# Check the new register value in hexadecimal.
simics> output-radix 16
simics> agilex.hps.core[1].read-reg x8
0x2801111
Level Two Title