AN 981: Using Generic QSPI Flash on SDM Devices

Download PDF
ID 778053
Date 7/02/2024
Public
Document Table of Contents
Document Table of Contents x
1. Introduction 2. Overview 3. Requirements 4. Implementation Flow 5. Debugging QSPI Flash Device using QSPI Debugger 6. Document Revision History for AN 981: Using Generic QSPI Flash on SDM Devices
3. Requirements x
3.1. QPI Mode (4-4-4 protocol) 3.2. Sector Erase Size 3.3. Maximum QSPI Clock 3.4. QSPI Flash Device Reset Pin 3.5. QSPI Page Program Opcode 3.6. SFDP Parameters
4. Implementation Flow x
4.1. Generating Programming Files using Programming File Generator 4.2. Programming .jic files into QSPI Flash Device 4.3. Hard Processor System (HPS) Support
1. Introduction
2. Overview
3. Requirements
4. Implementation Flow
5. Debugging QSPI Flash Device using QSPI Debugger
6. Document Revision History for AN 981: Using Generic QSPI Flash on SDM Devices

3.3. Maximum QSPI Clock

You can set various AS_CLK frequency in your Quartus Project, the supported AS_CLK frequencies have dependency on your configuration clock source. Refer to the following table for supported AS_CLK frequencies.

Table 1.  Support AS_CLK Frequency for the Respective Configuration Clock Source
Configuration Clock Source AS_CLK Frequency (MHz)
Internal Oscillator 25
58
77
115
OSC_CLK_1 (25/100/125 MHz) 25
50
71.5
100
125
166

You need to make sure the AS_CLK frequency setting is less than the maximum supported QSPI clock frequency published in the QSPI flash device datasheet.

Level Two Title