Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 4/03/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.1.16. Priority Flow Control TX Queue Statistics

Description: PFC Statistc for TX Queue

Byte Offset: 0x4020 + 4 x (0 - 7)

Addressing Mode: 32 bits

Bit Type Reset Description
31:16 - - Reserved
15 RO 0 Indicates the packet drop count due to PFC TX queue W