Ethernet Subsystem Intel® FPGA IP User Guide

ID 773413
Date 8/29/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

7.2.1.1. Recognized and Unrecognized Packet Counters

Offset Bit Description
0x100 [31:0] Number of packets that matched a path in the parse graph (lower 32 bits)
0x104 [15:0] Number of recognized packets that matched a path in the parse graph (upper 16 bits)
0x108 [31:0] Number of unrecognized packets that do not match a path in the parse graph (lower 32 bits)
0x10C [15:0] Number of unrecognized packets that do not match a path in the parse graph (upper 16 bits)