Visible to Intel only — GUID: jzs1678090774206
Ixiasoft
1. About the Parameterizable Macros for Intel FPGAs User Guide
2. List of Parameterizable Macros for Intel FPGAs
3. Inserting HDL Code from Parameterizable Macros Template
4. Dual-Port Random Access Memory (RAM)
5. FIFO
6. Document Revision History for the Parameterizable Macros for Intel FPGAs User Guide
Visible to Intel only — GUID: jzs1678090774206
Ixiasoft
3. Inserting HDL Code from Parameterizable Macros Template
- Click File > New.
- In the New window, select the HDL language for the design files VHDL File or Verilog HDL File — and click OK.
A text editor tab with a blank file opens.
- Right-click the blank file and click Insert Template.
- In the Insert Template window, expand the section corresponding to the appropriate HDL, then expand the Intel Parameterizable Macros section.
- Select a template.
The template now appears in the Preview pane.
- To paste the HDL design into the blank Verilog or VHDL file you created, click Insert.
- Click Close to close the Insert Template dialog box.
Figure 1. Inserting a Parameterizable Macros Template