Visible to Intel only — GUID: qfj1656011656362
Ixiasoft
Visible to Intel only — GUID: qfj1656011656362
Ixiasoft
6.8. Building an FPGA Bitstream for the PCIe Example Design
- You must have a license for bitstream generation of the FPGA AI Suite IP.
- You must have a specific version of Quartus® Prime Pro Edition installed:
- The PCIe-based design example for Agilex™ 7 devices requires Quartus® Prime Pro Edition Version 22.4 or later. This document assumes that Version 24.2 is used.
- You must have the following paths included in your $PATH environment variable:
- quartus/bin
- qsys/bin
If you do not have a license for FPGA AI Suite, the generated IP has a built-in inference-count limitation. Any inference operations that occur after the limit is reached generate an error message that indicates that a license is required. To reset the inference count limit, you must reprogram the bitstream onto the FPGA device.
Building an FPGA Bitstream for the PCIe-Based Design Example for Agilex™ 7 Devices
cd $COREDLA_WORK/demo dla_build_example_design.py \ -a $COREDLA_ROOT/example_architectures/AGX7_Performance.arch \ --build -ed 3 -n 4 \ --build-dir build_AGX7_Performance \ --output-dir $COREDLA_WORK/demo/my_bitstreams
If the AOCL_BOARD_PACKAGE_ROOT environment variable is not set, the dla_build_example_design.py command returns an error message. To set this environment variable, review the instructions in Additional Software Prerequisites for the PCIe-based Design Example for Agilex 7 Devices.
dla_build_example_design.py --helpThe dla_build_example_design.py command provides a --seed option that you can use to vary the Quartus® Prime random seed.
This commands places the bitstreams into the my_bitstreams directory. The bitstream is named AGX7_Performance.sof.
After the bitstream is built, you must program it onto the FPGA following the instructions in section Programming the FPGA Device.
Building an FPGA Bitstream for the PCIe-Based Design Example for Agilex™ 7 Devices (WSL 2)
- On your Microsoft* Windows* system, start an Ubuntu* 20.04 terminal session.
- At the Ubuntu* command prompt, run the following command:
cd $COREDLA_WORK/demo dla_build_example_design.py \ -a $COREDLA_ROOT/example_architectures/AGX7_Performance.arch \ --build -ed 3 -n 4 \ --build-dir build_AGX7_Performance \ --output-dir $COREDLA_WORK/demo/my_bitstreams \ --wsl true
- Follow the instructions provided by the command output. The provided instructions guide you through the following tasks:
- Copying the finalizing command from the command output.
-
Pasting the finalizing command and running it at a Windows* command prompt.