MACsec Intel® FPGA System Design User Guide

ID 767516
Date 10/02/2023
Public

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Document Table of Contents

6.5.1.1.2. PORT Reset

For port reset, update the registers below:
  • Set “Control port enable” to False (default value is False).
  • Program the per-MACsec instance configuration:
    • Set all the global stats counters to 0x0 (default is 0x0).
    • Set the key length (False – 128 bits, True – 256 bits) for the MACSEC instance associated with the port.
    • Set the extended packet numbering mode for the MACsec instance associated with the port. (False – regular packet numbering, True – extended packet numbering).
    • Zeroing port SAs (GLOBAL_ZERO CSR)
    • (Optional) Set the confidentiality offset for the MACSEC instance (default is 0x0).