MACsec Intel® FPGA System Design User Guide

ID 767516
Date 10/02/2023
Public

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2.9. Error Handling

Errors are possible at different levels in any system and system level handling of a few errors is always important as some error scenarios may be fatal, non-fatal and not correctable. Even if they are correctable, the system level application should understand the performance impact due to this. In this system level example design, there are 3 main interfaces i.e. Ethernet MAC, MACsec and PCIe where the potential errors are possible.