AN 992: Best Practices for Floorplanning Partial Reconfiguration Designs

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ID 764994
Date 2/21/2023
Public
Document Table of Contents
Document Table of Contents x
1. Answers to Top FAQs 2. Best Practices for Floorplanning Partial Reconfiguration Designs
2. Best Practices for Floorplanning Partial Reconfiguration Designs x
2.1. Document Prerequisites 2.2. Best Practice PR Design Techniques 2.3. Document Revision History of AN 992: Best Practices for Floorplanning Partial Reconfiguration Designs
2.2. Best Practice PR Design Techniques x
2.2.1. Technique 1: Use Joint Periphery Placement Regions 2.2.2. Technique 2: Lock Down the Periphery Elements 2.2.3. Technique 3: Reduce Data Connections Across Logic Lock Boundaries 2.2.4. Technique 4: Lock Down PR Boundary Ports
1. Answers to Top FAQs
2. Best Practices for Floorplanning Partial Reconfiguration Designs

2.3. Document Revision History of AN 992: Best Practices for Floorplanning Partial Reconfiguration Designs

Document Version Intel® Quartus® Prime Version Changes
2023.02.21 22.4

Initial release of the document.
Level Two Title