AN 976: JESD204C Intel® FPGA IP and ADI AD9081 MxFE* DAC Interoperability Report for Intel® Agilex® F-Tile Devices

Download PDF
ID 763505
Date 1/10/2023
Public
Document Table of Contents
Document Table of Contents x
1. JESD204C Intel® FPGA IP and ADI AD9081 MxFE* DAC Interoperability Report for Intel® Agilex™ F-tile Devices
1. JESD204C Intel® FPGA IP and ADI AD9081 MxFE* DAC Interoperability Report for Intel® Agilex™ F-tile Devices x
1.1. Hardware and Software Requirements 1.2. Hardware Setup 1.3. System Description 1.4. Interoperability Methodology 1.5. JESD204C Intel® FPGA IP and DAC Configurations 1.6. Test Results 1.7. Test Result Comments 1.8. Summary 1.9. Document Revision History for AN 976: JESD204C Intel® FPGA IP and ADI AD9081 MxFE* DAC Interoperability Report for Intel® Agilex™ F-Tile Devices
1.4. Interoperability Methodology x
1.4.1. Transmitter Data Link Layer 1.4.2. Transmitter Transport Layer (TL)
1. JESD204C Intel® FPGA IP and ADI AD9081 MxFE* DAC Interoperability Report for Intel® Agilex™ F-tile Devices

1.4. Interoperability Methodology

The following section describes the test objectives, procedure, and the passing criteria. The test covers the following areas:
  • Transmitter data link layer
  • Transmitter transport layer

Section Content
Transmitter Data Link Layer
Transmitter Transport Layer (TL)

Level Two Title