F-Tile 25G Ethernet Intel® FPGA IP User Guide

ID 750198
Date 11/29/2023
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

5.1.6.3. Dynamic Reconfiguration QSF Settings

By default, the F-Tile 25G Ethernet Intel FPGA IP uses the 400G hard IP. You have to add QSF constraints to use the 200G hard IP in your design.

Examples of QSF constraints:

set_instance_assignment -name IP_BB_LOCATION x_z1577b|e200|e200g_25g_0|tx -to dut|f_xcvr_25g|hip_inst|x_bb_f_ehip|x_bb_f_ehip_tx -entity <entity_name>
set_instance_assignment -name IP_BB_LOCATION x_z1577b|e200|e200g_25g_0|rx -to dut|f_xcvr_25g|hip_inst|x_bb_f_ehip|x_bb_f_ehip_rx -entity <entity_name>