AN 973: Three-phase Boost Bidirectional AC/DC Converter for Electric Vehicle (EV) Charging

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ID 733436
Date 6/23/2022
Public
Document Table of Contents
Document Table of Contents x
1. Three-phase Boost Bidirectional AC/DC Converter for Electric Vehicle (EV) Charging Design Example Overview 2. Downloading and Installing the Design Example 3. Model Description 4. FPGA Resource Use Comparison 5. Locating Top-level VHDL Wrapper 6. Generating HDL Code with MATLAB and HDL Coder 7. Simulink Simulation Results 8. Document Revision History for AN 973: Three-phase Boost Bidirectional AC/DC Converter for EV Charging
2. Downloading and Installing the Design Example x
2.1. Software Requirements 2.2. Hardware Requirements 2.3. Downloading and Installing the Design
3. Model Description x
3.1. Simscape* Model 3.2. Simulink* Model 3.3. HDL Inputs, Outputs, and Parameters
3.2. Simulink* Model x
3.2.1. Controller Block 3.2.2. Power Electronics Block Model 3.2.3. Source Voltage Generator Block
3.2.1. Controller Block x
3.2.1.1. Pulse Width Modulation (PWM) Controller 3.2.1.2. Phase-locked Loop (PLL) 3.2.1.3. Sampling Circuit 3.2.1.4. Clarke and Park Transforms
3.2.2. Power Electronics Block Model x
3.2.2.1. Six-switch Power Converter 3.2.2.2. Inductors 3.2.2.3. Output Capacitor
6. Generating HDL Code with MATLAB and HDL Coder x
6.1. Generating HDL and QPF Using MATLAB Scripts 6.2. Generating HDL and QPF Using MATLAB GUI Tools
1. Three-phase Boost Bidirectional AC/DC Converter for Electric Vehicle (EV) Charging Design Example Overview
2. Downloading and Installing the Design Example
3. Model Description
4. FPGA Resource Use Comparison
5. Locating Top-level VHDL Wrapper
6. Generating HDL Code with MATLAB and HDL Coder
7. Simulink Simulation Results
8. Document Revision History for AN 973: Three-phase Boost Bidirectional AC/DC Converter for EV Charging

6. Generating HDL Code with MATLAB and HDL Coder

The Three-phase Boost Bidirectional AC/DC Converter for EV Charging design example provides means to generate HDL code that you can import into an Intel® Quartus® Prime software project and program the Intel® FPGA boards with it.

The following sections provide instructions to generate HDL code (based on MATLAB*, Simulink* toolbox, and HDL Coder toolbox) and Intel® Quartus® Prime software projects for Intel® MAX® 10 FPGA Development Kit and Cyclone® V SoC Development Kit:


Section Content
Generating HDL and QPF Using MATLAB Scripts
Generating HDL and QPF Using MATLAB GUI Tools

Level Two Title