AN 693: Remote Hardware Debugging over TCP/IP for Altera SoC

ID 723698
Date 5/11/2015
Public

1.4. Hardware Requirements

  • SLD Hub Controller
  • Microprocessor connected to the Altera FPGA (either internally or externally)
  • Altera SoC with the HPS connected to an Ethernet port
  • TCP/IP stack
  • Programming device connected to an Ethernet cable at the remote location