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Ixiasoft
2.1. Clock Signals
2.2. Reset Signals
2.3. TX MII Interface (64b/66b)
2.4. RX MII Interface (64b/66b)
2.5. Status Interface for 64b/66b Line Rate
2.6. TX Interface (8b/10b)
2.7. RX Interface (8b/10b)
2.8. Status Interface for 8b/10b Line Rate
2.9. Serial Interface
2.10. CPRI PHY Reconfiguration Interface
2.11. Datapath Avalon Memory-Mapped Interface
2.12. PMA Avalon Memory-Mapped Interface
Visible to Intel only — GUID: wyd1642543987950
Ixiasoft
6. Configuration Registers
You can access the CPRI registers for the F-Tile CPRI PHY Multirate Intel® FPGA IP core using the Avalon memory-mapped interface on each channel.
Register Type | Address Range |
---|---|
CPRI PHY Registers | 0x0-0x3C |