AN 964: Signal Tap Tutorial for Intel Agilex® 7 Partial Reconfiguration Designs

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ID 710463
Date 10/02/2023
Public
Document Table of Contents
Document Table of Contents x
1. Tutorial Overview 2. Tutorial Walkthrough 3. Tutorial Results 4. AN 964: Signal Tap Tutorial for Intel Agilex® 7 Partial Reconfiguration Design Archives 5. AN 964: Signal Tap Tutorial for Intel Agilex® 7 Partial Reconfiguration Design Revision History
1. Tutorial Overview x
1.1. PR Debug Considerations 1.2. Tutorial Software and Hardware Requirements 1.3. Tutorial Design Description 1.4. Downloading the Tutorial Design
1.4. Downloading the Tutorial Design x
1.4.1. Tutorial Design Files
2. Tutorial Walkthrough x
2.1. Step 1: Getting Started 2.2. Step 2: Preparing the Base Revision 2.3. Step 3: Preparing the Implementation Revisions for Debugging 2.4. Step 4: Configuring Signal Tap Logic Analyzer 2.5. Step 5: Generating Programming Files 2.6. Step 6: Programming the FPGA Device 2.7. Step 7: Performing Data Acquisition
2.2. Step 2: Preparing the Base Revision x
2.2.1. Preparing the Static Region 2.2.2. Preparing the Default PR Persona
2.4. Step 4: Configuring Signal Tap Logic Analyzer x
2.4.1. Tapping Signals in the Implementation Persona 2.4.2. Configuring Data Acquisition 2.4.3. Setting Trigger Conditions
2.4.2. Configuring Data Acquisition x
2.4.2.1. Add Acquisition Clock 2.4.2.2. Add Storage Parameters
3. Tutorial Results x
3.1. Waveforms for Slow Implementation 3.2. Waveforms for Default Implementation 3.3. Waveforms for Empty Implementation
1. Tutorial Overview
2. Tutorial Walkthrough
3. Tutorial Results
4. AN 964: Signal Tap Tutorial for Intel Agilex® 7 Partial Reconfiguration Design Archives
5. AN 964: Signal Tap Tutorial for Intel Agilex® 7 Partial Reconfiguration Design Revision History

2.5. Step 5: Generating Programming Files

The design is now ready for compilation. The Intel® Quartus® Prime Compiler generates files that you then program into the FPGA. This Partial Reconfiguration design requires generating .sof and .rbf files.

Compile each revision (blinking_led, blinking_led_slow, blinking_led_default, and blinking_led_empty) in the project as follows:

  1. Change the current revision by clicking Project > Revisions and selecting a revision to set as the current revision.
  2. Click Processing > Start Compilation.
  3. Repeat these steps for each revision.
Alternatively, you can compile the revisions with the following commands: 
quartus_sh --flow compile blinking_led -c blinking_led
quartus_sh --flow compile blinking_led -c blinking_led_slow
quartus_sh --flow compile blinking_led -c blinking_led_default
quartus_sh --flow compile blinking_led -c blinking_led_empty

If the compilation succeeds, the output files are now in the output_files directory.

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