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2.1. Step 1: Getting Started
2.2. Step 2: Preparing the Base Revision
2.3. Step 3: Preparing the Implementation Revisions for Debugging
2.4. Step 4: Configuring Signal Tap Logic Analyzer
2.5. Step 5: Generating Programming Files
2.6. Step 6: Programming the FPGA Device
2.7. Step 7: Performing Data Acquisition
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2.4.2. Configuring Data Acquisition
Specify the acquisition parameters in the Signal Configuration pane on the Setup tab of the Signal Tap Logic Analyzer.
Figure 21. Signal Configuration Pane