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1.2. Open the Example Design
The PLL_RAM example design includes Intel® FPGA IP cores to demonstrate the basic simulation flow. Perform the following steps to open the design example:
- Download and unzip the quartus-std-lite-pll-ram design example.
- Launch the Intel® Quartus® Prime Standard Edition software version 21.1.
- To open the example design project, click File > Open Project, select the pll_ram.qpf project file, and then click OK.
Figure 1. pll_ram Project in the Intel® Quartus® Prime Standard Edition