Visible to Intel only — GUID: icb1633439454116
Ixiasoft
Generating VHDL for the DC-DC Converter Design Example
The control and hardware simulator VHDL code targets the Intel MAX 10 FPGA Development Board.
- Start DSP Builder for Intel FPGAs.
- Change the directory to the matlab.
- Double click vvc_hwsim_adsp_vhdl.mdl to load the model.
- Click Simulation > Start.
DSP Builder for Intel FPGAs generates the VHDL files in matlab\rtl.