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Summary of Intel® Cyclone® 10 LP Features
Intel® Cyclone® 10 LP Available Options
Intel® Cyclone® 10 LP Maximum Resources
Intel® Cyclone® 10 LP Package Plan
Intel® Cyclone® 10 LP I/O Vertical Migration
Logic Elements and Logic Array Blocks
Embedded Multipliers
Embedded Memory Blocks
Clocking and PLL
FPGA General Purpose I/O
Configuration
Power Management
Document Revision History for Intel® Cyclone® 10 LP Device Overview
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Logic Elements and Logic Array Blocks
The LAB consists of 16 logic elements (LE) and a LAB-wide control block. An LE is the smallest unit of logic in the Intel® Cyclone® 10 LP device architecture. Each LE has four inputs, a four-input look-up table (LUT), a register, and output logic. The four-input LUT is a function generator that can implement any function with four variables.
Figure 3. Intel® Cyclone® 10 LP Device Family LEs